Nowadays a flash memory is a mainstream technology of a nonvolatile memory. The flash memory has advantages of being able to keep data in a case of power-off, having a good compatibility with a CMOS process and capable of erasing and writing data for multiple times, etc., and thus it is widely used in various products, for example, a storage and communication device such as a mobile phone, a laptop, a palmtop and a solid state driver. The flash memory usually employs a polysilicon floating gate to store data (charges). The flash memory cell and its floating gate structure are usually as shown in FIG. 1, where a voltage on a control gate controls a channel of the flash memory cell via the floating gate by a certain coupling ratio. The larger the coupling ratio is, the stronger the control capability of the control gate to the channel will be. Therefore, by improving the coupling ratio of the flash memory device, an operating voltage of the flash memory for programming and erasing may be reduced, and an influence on the reliability caused by a fluctuation of the number of charges stored on the floating gate may also be reduced. The coupling ratio Cr may be calculated via a formula
      Cr    =          Cono      Ctotal        ,where Ctotal is a summation of capacitances between the floating gate and all of the other electrodes, and Cono is a capacitance between the floating gate and the control gate, thus the coupling ratio may be effectively increased by increasing Cono. However, with a rapid diminishing of a size of the flash memory device, a space between adjacent cells is reduced drastically. In order to reduce a crosstalk between adjacent cells, a thickness of the floating gate should also be correspondingly reduced greatly, which causes an area of a dielectric layer between the floating gate and the control gate to be reduced drastically, thereby the capacitance value Cono is also reduced greatly. Thus, the coupling ratio is diminished with the diminishing of the size of the flash memory device, which may cause problems that it is difficult to lower an operating voltage and an anti-interference ability is poor. It is an effective method to improve the coupling ratio of the flash memory cell by employing a dielectric material having a high dielectric constant and increasing the contact area between the floating gate and the control gate in structure design.